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description the acpl-m60l is an optically coupled gate that com - bines a gaasp light emitting diode and an integrated high gain photo detector. the output of the detector ic is an open collector schottky-clamped transistor. the internal shield provides a guaranteed common mode transient immunity specifcation of 15 kv/s at 3.3v op - eration. this unique design provides maximum ac and dc circuit isolation while achieving lvttl/lvcmos compatibility. the optocoupler ac and dc operational parameters are guaranteed from C40?c to +85?c, allowing trouble-free system performance. these optocouplers are suitable for high speed logic interfacing, input/output bufering, as line receivers in environments that conventional line receivers cannot tolerate and are recommended for use in extremely high ground or induced noise environments. functional diagram features ? dual voltage operation (3.3v/5v) ? low power consumption ? 15 kv/s minimum common mode rejection (cmr) at v cm = 1000 v (3.3v operating voltage) ? high speed: 15 mbd typical ? lvttl/lvcmos compatible ? low input current capability: 5 ma ? guaranteed ac and dc performance over tempera - ture: C40?c to +85?c ? safety approvals; ul, csa, iec/en/din en 60747-5-2 ? surface mountable ? very small, low profle jedec registered package outline applications ? isolated line receiver ? computer-peripheral interfaces ? microprocessor system interfaces ? digital isolation for a/d, d/a conversion ? switching power supply ? instrument input/output isolation ? ground loop elimination ? pulse transformer replacement ? field buses caution: it is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by esd. v cc v o gnd 1 3 anode cathode 6 5 4 acpl-m60l small outline, 5 leads, high cmr, high speed, logic gate optocouplers data sheet
schematic acpl-m60l shield 6 5 4 1 3 use of a 0.1 f bypass capacitor must be connected between pins 6 and 4 (see note 1). i f i cc v cc v o gnd i o + ? truth table (positive logic) led on off output l h ordering information acpl-xxxx is ul recognized with 3750 vrms for 1 minute per ul1577 and is approved under csa component ac - ceptance notice #5, file ca 88324. option rohs part number compliant package surface mount tape & reel iec/en/din en 60747-5-2 quantity acpl-m60l -000e so-5 x 100 per tube -500e x x 1500 per reel to order, choose a part number from the part number column and combine with the desired option from the option column to form an order entry. combination of option 020 and option 060 is not available. example 1: acpl-m60l-500e to order product of surface mount so-5 in tape and reel packaging with rohs compliant. option datasheets are available. contact your avago sales representative or authorized distributor for information.
package outline drawing m60l xxx 6 5 4 3 1 7.0 0.2 (0.276 0.008) 2.5 0.1 (0.098 0.004) 0.102 0.102 (0.004 0.004) v cc v ou t gnd cathode anode 4.4 0.1 (0.173 0.004) 1.27 (0.050) bsc 0.15 0.025 (0.006 0.001) 0.71 (0.028) min. 0.4 0.05 (0.016 0.002) 3.6 0.1* (0.142 0.004) dimensions in millimeters (inches) * maximum mold flash on each side is 0.15 mm (0.006) note: floating lead protrusion is 0.15 mm (6 mils) max. 7 max. max. lead coplanarity = 0.102 (0.004) land pattern 8.27 (0.325) 2.0 (0.080) 2.5 (0.10) 1.3 (0.05) 0.64 (0.025) 4.4 (0.17)
solder refow temperature profle recommended pb-free ir profle 0 time (seconds) temperature (c) 200 100 50 150 100 200 250 300 0 30 sec. 50 sec. 30 sec. 160c 140c 150c peak temp . 245c peak temp . 240c peak temp. 230c soldering tim e 200c preheating tim e 150c, 90 + 30 sec. 2.5c 0.5c/sec. 3c + 1c/?0.5c tight typical loos e room temperature preheating rate 3c + 1c/?0.5c/sec. reflow heating rate 2.5c 0.5c/sec. 217 c ramp-d ow n 6 c/sec. max. ramp-u p 3 c/sec . max . 150 - 200 c 260 +0/-5 c t 25 c to pea k 60 to 150 sec. 20-40 sec. time w ithin 5 c of ac tu al peak tempera t ure t p t s prehea t 60 to 180 sec. t l t l t smax t smin 25 t p tim e tempera ture no tes: the time fr om 25 c to peak tempera ture = 8 minutes max. t smax = 200 c, t smin = 150 c note: non-halide fux should be used note: non-halide fux should be used
5 absolute maximum ratings (no derating required up to 85?c) parameter symbol min. max. units note storage temperature t s C55 125 ?c operating temperature? t a C40 85 ?c average forward input current i f 20 ma 1 reverse input voltage v r 5 v input power dissipation p i 40 mw supply voltage (1 minute maximum) v cc 7 v output collector current i o 50 ma output collector voltage v o 7 v output collector power dissipation p o 85 mw solder refow temperature profle see package outline drawings section recommended operating conditions parameter symbol min. max. units input current, low level i fl * 0 250 a input current, high level [1] i fh ** 5 15 ma power supply voltage v cc 2.7 3.6 v 4.5 5.5 v operating temperature t a C40 85 ?c fan out (at r l = 1 k?) [1] n 5 ttl loads output pull-up resistor r l 330 4 k ? *the of condition can also be guaranteed by ensuring that v fl f 0.8 volts. **the initial switching threshold is 5 ma or less. it is recommended that 6.3 ma to 10 ma be used for best performance and to permit at least a 20% led degradation guardband. insulation and safety related specifcations parameter symbol value units conditions minimum external air gap l (i01) 5 mm measured from input terminals to output (clearance) terminals minimum external tracking path l (i02) 5 mm measured from input terminals to output (creepage) terminals minimum internal plastic gap 0.08 mm through insulation distance, conductor to (clearance) conductor tracking resistance cti 175 v din iec 112/vde 0303 part 1 isolation group (per din vde 0109) iiia material group din vde 0109
electrical specifcations over recommended operating condition (t a = C40 c to +85 c , 2.7v v dd 3.6v) unless otherwise specifed. all typicals at v cc = 3.3 v, t a = 25 c. parameter symbol min. typ. max. units test conditions fig. note high level output current i oh * 4.5 50 a v cc = 3.3 v, v o = 3.3 v i f = 250 a 1 input threshold current i th 3.0 5.0 ma v cc = 3.3 v, v o = 0.6 v, i ol (sinking) = 13 ma low level output voltage v ol * 0.35 0.6 v v cc = 3.3 v, i f = 5 ma i ol (sinking) = 13 ma 2 high level supply current i cch 4.7 7.0 ma i f = 0 ma, v cc = 3.3 v low level supply current i ccl 7.0 10.0 ma i f = 10 ma, v cc = 3.3 v input forward voltage v f 1.4 1.5 1.75* v t a = 25?c, i f = 10 ma 5 input reverse breakdown voltage bv r * 5 v i r = 10 a input diode temperature coefcient ?v f / ?t a C1.6 mv/?c i f = 10 ma input-output insulation v iso 3750 v rms r h f 50%, t = 1 min. 12, 13 input capacitance c in 60 pf f = 1 mhz, v f = 0 v *the jedec registration specifes 0?c to +70?c. avago specifes C40?c to +85?c. electrical specifcations over recommended temperature (t a = C40 c to +85 c , 4.5v v dd 5.5v) unless otherwise specifed. all typical specifcation at v cc = 5v, t a = 25 c parameter symbol min. typ.* max. units test conditions fig. note high level output current i oh 5.5 100 a v cc = 5.5 v, v o = 5.5 v i f = 250 a 1 input threshold current i th 2 5 ma v cc = 5.5 v, i o 13 ma, v o = 0.6 v low level output voltage v ol 0.4 0.6 v v cc = 5.5 v, i f = 5 ma, i ol (sinking) = 13 ma 2 high level supply current i cch 4 7.5 ma v cc = 5.5 v, i f = 0 ma, low level supply current i ccl 6 10.5 v cc = 5.5 v, i f = 10 ma, input forward voltage v f 1.4 1.5 1.75 v t a = 25c, i f = 10 ma 5 1.3 1.85 i f = 10 ma input reverse breakdown voltage bv r 5 i r = 10 a input diode temperature coefcient ?v f /?t a -1.6 mv/c i f = 10 ma input-output insulation v iso 3750 v rms r h f 50%, t = 1 min. 12, 13 input capacitance c in 60 pf v f = 0v, f = 1 mhz *all typicals at t a = 25c, v cc = 5 v.
switching specifcations over recommended temperature (t a = C40?c to +85?c), v cc = 3.3 v, i f = 7.5 ma unless otherwise specifed. all typicals at t a = 25?c, v cc = 3.3 v. parameter symbol min. typ. max. units test conditions fig. note propagation delay time to high output level t plh 90 ns r l = 350 ? c l = 15 pf 6, 7, 8 5 propagation delay time to low output level t phl 75 ns r l = 350 ? c l = 15 pf 6, 7, 8 6 pulse width distortion |t phl C t plh | 25 ns r l = 350 ? c l = 15 pf 9 8 propagation delay skew t psk 40 ns r l = 350 ? c l = 15 pf output rise time (10-90%) t r 45 ns r l = 350 ? c l = 15 pf output fall time (90-10%) t f 20 ns r l = 350 ? c l = 15 pf *jedec registered data for the 6n137. switching specifcations over recommended temperature (t a = -40c to 85c), v cc = 5 v, i f = 7.5 ma unless otherwise specifed. all typicals at t a = 25?c, v cc = 5 v. parameter symbol min. typ.* max. unit test conditions fig. note propagation delay time to high output level t plh 20 48 75 ns t a = 25c, r l =350 ? c l =15pf 6, 7, 8 5 100 r l =350 ?, c l =15pf propagation delay time to low output level t phl 25 50 75 ns t a = 25c, r l =350 ? c l =15pf 6, 7, 8 6 100 r l =350 ?, c l =15pf pulse width distortion |t phl - t plh | 3.5 35 ns r l = 350 ? c l = 15 pf 9 8 propagation delay skew t psk 40 ns r l = 350 ? c l = 15 pf output rise time (10%-90%) t rise 24 ns r l = 350 ? c l = 15 pf output fall time (10%-90%) t fall 10 ns r l = 350 ? c l = 15 pf *all typicals at t a = 25c, v cc = 5 v.
notes: 1. peaking circuits may produce transient input currents up to 50 ma, 50 ns maximum pulse width, provided average current does not exceed 20 ma. 2. peaking circuits may produce transient input currents up to 50 ma, 50 ns maximum pulse width, provided average current does not exceed 15 ma. 3. derate linearly above +80?c free-air temperature at a rate of 2.7 mw/?c for the soic-5 package. 4. bypassing of the power supply line is required, with a 0.1 f ceramic disc capacitor adjacent to each optocoupler as illustrated in figure 11. total lead length between both ends of the capacitor and the isolator pins should not exceed 20 mm. 5. the t plh propagation delay is measured from the 3.75 ma point on the falling edge of the input pulse to the 1.5 v point on the rising edge of the output pulse. 6. the t phl propagation delay is measured from the 3.75 ma point on the rising edge of the input pulse to the 1.5 v point on the falling edge of the output pulse. 7. t psk is equal to the worst case diference in t phl and/or t plh that will be seen between units at any given temperature and specifed test conditions. 8. see test circuit for measurement details. 9. cm h is the maximum tolerable rate of rise on the common mode voltage to assure that the output will remain in a high logic state (i.e., v o > 2.0 v). 10. cm l is the maximum tolerable rate of fall of the common mode voltage to assure that the output will remain in a low logic state (i.e., v o < 0.8 v). 11. for sinusoidal voltages, (|dv cm | / dt) max = f cm v cm (p-p). 12. device considered a two terminal device: pins 1 and 3 shorted together, and pins 4, 5 and 6 shorted together. 13. in accordance with ul 1577, each optocoupler is proof tested by applying an insulation test voltage 4500 v rms for 1 second (leakage detection current limit, i i-o f 5 a). parameter sym. device min. typ. units test conditions fig. note logic high common mode transient immunity |cm h | acpl-m60l 15,000 25,000 v/s |v cm | = 1000 v v cc = 3.3 v, i f = 0 ma, v o(min) = 2 v, r l = 350 ?, t a = 25?c 9 9, 11 10,000 15,000 v cc = 5 v, i f = 0 ma, v o(min) = 2 v, r l = 350 ?, t a = 25?c 9 9, 11 logic low common mode transient immunity |cm l | acpl-m60l 15,000 25,000 v/s |v cm | = 1000 v v cc = 3.3 v, i f = 7.5 ma, v o(max) = 0.8 v, r l = 350 ?, t a = 25?c 9 10, 11 10,000 15,000 v cc = 5 v, i f = 7.5 ma, v o(min) = 0.8 v, r l = 350 ?, t a = 25?c 9 10, 11 figure 1. typical high level output current vs. temperature. i oh - high level output current - a -60 0 t a - temperature - c 100 10 15 -20 5 20 v cc = 5.5 v v o = 5.5 v i f = 250 a 60 -40 0 4 0 8 0 i oh ? high level output current ? a -60 0 t a ? temperature ? c 100 10 15 -20 5 20 v cc = 3.3 v v o = 3.3 v i f = 250 a 60 -40 0 4 0 8 0 -60 0 100 10 15 -20 5 20 v cc = 3.3 v v o = 3.3 v i f = 250 a 60 -40 0 4 0 8 0
figure 3. typical low level output voltage vs. temperature. figure 5. typical input diode forward charac - teristic. figure 4. typical low level output current vs. temperature. v cc = 3.3 v v o = 0.6 v 12 6 -60 -20 20 60 100 t a ? temperature ? c 4 80 40 0 -40 0 i th ? input threshold current ? ma r l = 350 k ? 2 8 10 r l = 1 k ? r l = 4 k ? figure 2. typical input threshold current vs. temperature 0.8 0.4 -60 -20 20 60 100 t a ? temperature ? c 0.2 80 40 0 -40 0 v ol ? low level output voltage ? v i o = 13 ma 0.1 0.5 0.7 v cc = 3.3 v i f = 5.0 ma 0.3 0.6 v cc = 5.5 v i f = 5.0 ma 0.5 0.4 -60 -20 20 60 100 t a - temperature - c 0.3 80 40 0 -40 0.1 v ol - low level output voltage - v 0.2 i o = 12.8 ma v cc = 3.3 v v ol = 0.6 v 70 60 -60 -20 20 60 100 t a ? temperature ? c 50 80 40 0 -40 20 i ol ? low level output current ? ma 40 i f = 5.0 ma i ol - low level output current - m a -60 0 t a - temperature - c 100 60 80 -20 20 20 v cc = 5.0 v v ol = 0.6 v 60 -40 0 4 0 8 0 40 i f = 5.0 m a i f ? forward current ? ma 1.1 0.001 v f ? forward voltage ? v 1.0 1000 1.3 0.01 1.5 1.2 1.4 0.1 t a = 25 c 10 100 i f + ? v f 1.6 i th ? input threshold current ? ma -60 0 t a ? temperature ? c 100 4 hcpl-m600 fig 13 5 -20 2 20 60 -40 0 4 0 8 0 3 v cc = 5.0 v v o = 0.6 v 1 r l = 4 k ? r l = 1 k ? r l = 350 ? 6
10 figure 6. test circuit for t phl and t plh . output v o monitoring node 3.3 v pulse gen. z = 50 ? t = t = 5 ns o f i f r l r m 0.1 f bypass * c l input monitoring node r * c l is approximately 15 pf which includes probe and stray wiring capacitance. 1.5 v t phl t plh i f input v o output i f = 7.50 ma i f = 3.75 ma 4 5 6 v cc gnd 3 1 output v o monitoring node 1.5 v t plh t phl i f input v o output i f = 7.5 ma i f = 3.75 ma +5 v i f r l r m 0.1f bypass * c l * c l is approximately 15 pf which includes probe and stray wiring capacitance. input monitoring node pulse gen. z o = 50 ? t f = t r = 5 ns v cc gnd 1 3 6 5 4 figure 7. typical propagation delay vs. temperature. v cc = 5.0 v i f = 7.5 m a 10 0 80 -60 -2 0 2 0 60 100 t a - temperature - c 60 80 40 0 -4 0 0 t p - propagation delay - n s 40 20 t plh , r l = 350 ? t phl , r l = 350 ? v cc = 3.3 v i f = 7.5 m a 150 120 -6 0 - 20 20 60 100 t a ? temperature ? c 90 80 40 0 -4 0 0 t p ? propagation delay ? ns 60 30 t phl , r l = 350 ? t plh , r l = 350 ?
for product information and a complete list of distributors, please go to our website: www.avagotech.com avago, avago technologies, and the a logo are trademarks of avago technologies limited in the united states and other countries. data subject to change. copyright ? 00 avago technologies limited. all rights reserved. obsoletes av01-0en av0 -0 1en - december 1, 00 3.3 v 4 5 6 1 3 v cc 0.1 f bypass gnd output v o monitoring node pulse generator z o = 50 ? + i f b a v ff ? 350 ? v o 0.5 v v o (min.) 3.3 v 0 v switch at a: i f = 0 m a switch at b: i f = 7.5 m a v cm cm h cm l v o (max.) v cm (peak) v o v o 0.5 v v o (min.) 5 v 0 v switch at a: i f = 0 ma switch at b: i f = 7.5 ma v cm cm h cm l v o (max.) v cm (peak) v o +5 v 0.1 f bypass + _ 350 ? v ff 1 3 6 5 4 b a output v o monitoring node i f pulse generator z o = 50 ? v cc gnd figure 9. test circuit for common mode transient immunity and typical waveforms. figure 8. typical pulse width distortion vs. temperature. v cc = 5.0 v i f = 7.5 ma 40 30 -20 20 60 100 t a - temperature - c 20 80 40 0 -40 pwd - pulse width distortion - n s 10 r l = 350 k ? 0 -60 -10 v cc = 3.3 v i f = 7.5 m a 50 40 -2 0 2 0 60 100 t a ? temperature ? c 30 80 40 0 -4 0 pwd ? pulse width distortion ? ns 20 r l = 350 ? 10 -6 0 0

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